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    • 专利摘要:
    system, and, partial discharge detection method a partial discharge detection system (1000) comprising a partial discharge acquisition and processing device (400) including: a partial discharge detection device (401) configured to provide a signal electrical partial discharge detected (spd1) from partial discharge pulse generated by a first electrical object (100); a first communication module (407) configured to receive a detected synchronization signal carrying detected synchronization phase values (?actn) and corresponding reference time values (tn) associated with an electrical supply voltage (vac) of one second electrical object (103). the partial discharge detection system further includes: a phase value generator (11) configured to produce synthesized phase values (?syntn) representing a synthesized synchronization signal (ssyn1), the phase value generator (11) being adjustable according to phase errors; an error computing module (9) configured to compute said phase errors (?ti) from the synthesized phase values (?syntn), the detected synchronization phase values (?actn) and the reference time values corresponding (tn).
    公开号:BR112016009373B1
    申请号:R112016009373-9
    申请日:2013-10-29
    公开日:2021-06-29
    发明作者:Antonio Di Stefano；Roberto Candela；Giuseppe Fiscelli
    申请人:Prysmian S.P.A.；
    IPC主号:
    专利说明:

    FUNDAMENTALS Technical Field
    [001] The present invention relates to partial discharge detection systems and, particularly, to systems for detecting partial discharge pulses synchronized with an electrical power supply voltage. Description of Related Art
    [002] Partial Discharge Detection is particularly used to identify and measure partial discharges in electrical components and appliances such as: medium, high or extra high voltage cables, cable junctions, overload line insulators, medium control panels and high voltage, high voltage and extra high voltage cables using Gas Insulated Switchgear (GIS), substations, transformers, motors.
    [003] The term partial discharges is intended to indicate an unwanted recombination of electrical charges occurring in the dielectric material (insulator) of electrical components, when the latter presents defects of various types, eventually leading to the destruction of the dielectric. Here, a pulse current is generated in portions of the dielectric material and causes an electromagnetic wave to propagate through the power or ground cables of the relevant electrical system, and radiating through the various surrounding media (dielectric material, metals, air, etc.).
    [004] To perform partial discharge measurements on AC electrical components (Alternating Current) it is important to have a phase reference signal, that is, a signal that is synchronized in phase and frequency with the AC voltage supply of the electrical component. Useful diagnostic figures are obtained by plotting the maximum amplitude of the partial discharge pulses versus the phase of the supply voltage when they occur.
    [005] In some cases, sensing the AC supply voltage to obtain its phase angle implies using specific sensors that must be connected to the components under test. This operation generally requires the component to be disconnected from its supply (turned off) and then reconnected: this operation is often impractical, has high overhead costs and cannot be done at all in many cases.
    [006] Document WO-A-2009-150627 describes, among others, a small-sized, isolated and self-energized partial discharge detection device, which allows measurements to be carried out with the highest security without the need for direct connection to the system under review. The device comprises a wideband antenna adapted to act as an electric field sensor and including a first planar conductor (i.e. a ground plane) cooperating with a second conductor whose profile converges to the first planar conductor at a point or a line . The partial discharge detection device can also detect a synchronization signal, which is obtained by sensing the supply voltage of the discharge generating components.
    [007] There are practical conditions in which the detection of the supply voltage of a partial discharge generating component can be performed, neither in contact or non-contact technologies in the partial discharge generating component, but it has to be performed in another component electrical and away from the component under test.
    [008] Document JP-A-6-11534 describes a partial discharge measurement system comprising a solenoid coil sensing part that is provided in a power cable that is placed in a working duct inside a manhole underground, the output signal is detected by a partial discharge detection part and then the detection signal is transmitted to the antenna of a manhole cover by a detection signal transmission part. A DC regulated power supply receives power from the cable through a transformer to receive the power supply. The applied voltage phase information of the cable is transmitted over the electric wave of a mobile phone, from a substation on one side of the transmission terminal provided with a voltage transformer. A partial voltage and applied voltage phase receiving device, which is provided near the cover of the underground manhole is provided with a radio signal receiving part and a telephone signal receiving antenna, obtains the partial discharge signal from the power cable under test and the applied voltage phase information signal and then analyze the partial discharge pulse with the applied voltage phase as parameter.
    [009] Document JP200307551 describes a technique according to which a radio wave having a time signal sent by a GPS satellite is received in a partial discharge signal detection part, and in a voltage signal detection part. of application. At this time, the signal and signals detected by the application voltage signal detecting part and the partial discharge signal detecting part are recorded. BRIEF SUMMARY OF THE INVENTION
    [0010] The Applicant experienced that a synchronization signal detection device is necessary to reference the detection of partial discharge to the pulse of the electrical voltage supplying the electrical object under test. In some situations, the detection of the AC supply voltage is performed remotely with respect to the instrument by detecting the partial discharge pulses and the detected AC supply voltage is transmitted to the partial discharge signal apparatus. Transmission of the detected AC power supply voltage makes it difficult to effectively implement synchronization between the two detected signals, since the remotely detected synchronization signal (corresponding to the AC power supply voltage) reaches the partial discharge apparatus with a time delay which does not allow real-time synchronization with the detected signal in partial discharge.
    [0011] The Applicant has found that synthesized phase data reproducing the pattern of a remotely detected AC electrical voltage can be used to synchronize the detected partial discharge signal with the phase angle of the AC supply voltage, provided that the synthesized phases are adjusted based on samples of remotely sensed AC electrical voltage.
    [0012] According to a first aspect, the present invention relates to a partial discharge detection system comprising a partial discharge acquisition and processing device comprising: a partial discharge detection device configured to provide a detected electrical signal partial discharge from a partial discharge pulse generated by a first electrical object; a first communication module configured to receive a sensed sync signal carrying sensed sync phase values and corresponding reference time values associated with an electrical supply voltage of a second electrical object; a phase value generator configured to produce synthesized phase values representing a synthesized synchronization signal, the phase value generator being adjustable according to phase errors; an error computing module configured to compute said phase errors from synthesized phase values, detected sync phase values and corresponding reference time value.
    [0013] In one embodiment of the invention, the error computing module is configured to compute a current phase error from a previous detected sync phase value associated with a past reference time value and a comparison value . The partial discharge acquisition and processing device further includes: a time shifter module configured to select, from the synthesized phase values, a past synthesized phase value generated at said past reference time value and to provide said synthesized phase value passed as a comparison value to the error computation module.
    [0014] In one embodiment of the invention, the partial discharge detection system further comprises a synchronization detection apparatus comprising: a sensor module for converting the electrical supply voltage into a converted electrical signal; a sync processing module structured to receive the converted electrical signal and generate said sync signal associated with the detected sync phase values and corresponding reference time values; a second communication module configured to transmit said detected synchronization signal over a communication network connectable to said first communication module.
    [0015] In one embodiment of the invention, the partial discharge detection system further comprises a structured time reference source for providing a time reference signal to the partial discharge acquisition and processing device and to the synchronization detection apparatus for generate said reference time values. Said time reference source can be one of the following sources: Global Positioning System (GPS) time source, stable oscillator time source, IEEE 1588 network time source.
    [0016] In one embodiment of the invention, the partial discharge acquisition and processing device is placed remotely to the second electrical object. The partial discharge acquisition and processing device comprises: an acquisition device configured to process the detected partial discharge electrical signal and provide partial discharge amplitude.
    [0017] According to a particular embodiment, the sensor module of the synchronization detection apparatus is one of the following devices: voltage transformer, capacitive coupler. The partial discharge detection device can have one of the following sensors: contact sensor, non-contact sensor, Rogowsky sensor, magnetic sensor of coupler transformer type, magnetic field proximity sensor, acoustic sensor, piezoelectric sensor, antenna sensor.
    [0018] In one embodiment of the invention, the partial discharge acquisition and processing device further comprises a first local clock generator, configured to produce, from the time reference signal, a timing signal to synchronize the acquisition device and the synchronization detection apparatus comprises a second local clock generator configured to produce said reference time values from the time reference signal.
    [0019] In one embodiment of the invention, the partial discharge detection system further comprises a display connected to the partial discharge acquisition and processing device and configured to display said partial discharge amplitude values and corresponding to the synthesized phase values. In a particular embodiment, the partial discharge acquisition and processing device further includes a filter module configured to filter out phase errors, reducing the abrupt phase transition in the synthesized phase values produced by the phase value generator.
    [0020] According to one embodiment, the adjustable phase value generator is configured to generate a periodic digital waveform presenting the frequency of said power supply voltage, and particularly the phase value generator is a direct digital synthesizer (DDS), configured to generate a signal with a frequency in the range of 0.01 Hz to 10 KHz.
    [0021] The communication network (NTW) can be at least one of the following networks: a packet network, a Local Area Network (LAN), a Wide Area Network (WAN), Ethernet, WiFi, Global System network for Mobile Communication (GSM)/3G.
    [0022] According to a second aspect, the present invention relates to a partial discharge detection method, comprising, in a first processing apparatus: detecting a partial discharge pulse generated by a first electrical object and providing a signal electric partial discharge detected; receiving a sensed sync signal carrying sensed sync phase values and corresponding reference time values associated with an electrical supply voltage of a second electrical object; generating a plurality of synthesized phase values representing a synthesized synchronization signal; computing phase errors from the synthesized phase values, the detected sync phase values, and the corresponding reference time values; adjust phases of the various synthesized phase values according to phase errors.
    [0023] According to a specific embodiment, the detection method further includes: selecting from the plurality of synthesized phase values, a past synthesized phase value generated at said past reference time value; wherein computing said phase errors includes computing, at a current time, a current phase error from a past detected sync phase value associated with a past reference time value and said past synthesized phase value.
    [0024] In an embodiment of the invention, the detection method includes, in a second processing apparatus: converting the electrical supply voltage into a converted electrical signal; receiving the converted electrical signal and generating said detected sync signal, associating the detected sync phase values with corresponding reference time values; transmitting towards said processing apparatus said synchronization signal over a communication network.
    [0025] According to a particular embodiment, the detection method further comprises: processing the detected partial discharge electrical signal and providing partial discharge amplitude values, displaying said partial discharge amplitude values in the corresponding synthesized phase values. BRIEF DESCRIPTION OF THE DRAWINGS
    [0026] Additional features and advantages will be more apparent from the following description of a preferred embodiment and its alternatives given by way of example with reference to the accompanying drawings, in which: Figure 1 shows an example of a partial discharge detection system comprising a partial discharge acquisition and display apparatus and a synchronization detection apparatus; Figure 2 shows an embodiment of an acquisition and processing device included in said partial discharge acquisition and display apparatus; Figure 3 shows an embodiment of a frequency controlled synthesizer included in the acquisition and processing device of Figure 2; Figure 4 shows an example of a display included in the partial discharge acquisition and display apparatus of Figure 1; Figure 5a illustrates an example of the trend of a sync synthesized signal as generated from the frequency controlled synthesizer of Figure 3; Figure 5b illustrates an example of a reconstructed sync synthesized signal; Figure 6 is a plot of detected partial discharge samples synchronized with a synthesized signal. DETAILED DESCRIPTION
    [0027] In the following description, the same alphanumeric references are used for analogous exemplifying elements when they are arranged in different drawings. Figure 1 shows a partial discharge detection system 1000 comprising a first electrical object 100 and at least one partial discharge acquisition and display apparatus 500 which includes an acquisition and processing device 400 and a display 300 (DYS-DEV). The partial discharge acquisition and visualization apparatus 500 is an electronic apparatus employable for detecting, measuring and/or analyzing partial discharges generated by electronic sources, such as the electrical object 100 itself. The acquisition and processing device 400 may be portable and includes a or more batteries.
    [0028] According to an example, the first electrical object 100 is a cable junction or a cross-link junction that joins a first electrical cable 101 with a second electrical cable 102. The first electrical cable 101 is supplied with AC electrical voltage (Alternating Current) VAC. Typically, the AC VAC electrical voltage has a frequency in the range of 1 Hz to about 1000 Hz. The cable junction 100 can produce impulse signals of partial electromagnetic discharges Sd.
    [0029] The partial discharge detection system 1000 also shows a second electrical object 103 and at least one synchronization detection apparatus 200. The synchronization detection apparatus 200 may be portable and includes one or more batteries. As an example, the second electrical object 103 is another cable or a medium or high voltage termination (MV/HV termination), which is connected to an electrical transmission or distribution network, also connected to the first electrical object 100. Thus, the second electrical object 103 is supplied with an AC VAC electrical voltage having the same characteristics in time (i.e. sinusoidal shape, frequency and phase) as the AC electrical voltage supplying the first electrical object 100. The second electrical object 103 can be adapted to produce and radiate a first electromagnetic signal SES1 generated by and synchronized with the AC voltage VaC. The synchronization detection apparatus 200 is configured to detect the electrical voltage VaC feeding the second electrical object 103 and generate corresponding digital data representing the electrical voltage AC VaC to be provided to the partial discharge acquisition and display apparatus 500. In particular, the apparatus sync detection 200 and partial discharge acquisition and display apparatus 500 are distant from each other. As an example, the synchronization detection apparatus 200 can be placed at a distance from the partial discharge acquisition and display apparatus 500 included in the range of 1 m to 1000 km.
    [0030] In Figure 1, a time reference source 800 (TM-REF) is also shown which is particularly external to the partial discharge acquisition and display apparatus 500 and to the synchronization detection apparatus 200. 800 time is an absolute precision time source that can be accessed substantially without deformation or drift, in different distant geographic locations. According to a first and preferred embodiment, the time reference source 800 is a time source of a Global Positioning System (GPS) or other satellite positioning system as an example, GLONASS and GALILEO which radiate a reference signal of STM time. The GPS system has a theoretical accuracy of about 10 ns and is available worldwide, yet it is relatively inexpensive. GPS receivers provide a text string containing the universal date and time (UTC) and a pulse signal (called 1PPS) every second that features a rising edge placed at the exact beginning of the universal second. As also described below, partial discharge acquisition and display apparatus 500 and synchronization detection apparatus 200 are provided with a respective GPS receiver. The overall accuracy achievable with a satellite positioning system is well below 1 μs which is a very good resolution considering that it corresponds to an angle of 0.018o for a 50Hz signal and 0.022o for a 60Hz.
    [0031] According to another embodiment, the time reference source 800 may be a computer network defining a synchronization time signal used to synchronize the computers/devices on the network. As an example, the 800 time reference source is associated with a network as per IEEE 1588. This standard and associated systems allow precise synchronization (also below 1 µs) between devices connected to the same network. This is generally applied to wired Local Area Network (LAN), but it can also be employed over larger networks with slightly reduced performance. Using the IEEE 1588 method may be a preferred synchronization method when GPS signal is not available. The IEEE 1588 network can also be used advantageously as an additional time reference source 850 in conjunction with the time reference source 800, for example, to bring the time signal into underground locations. In these cases, the GPS synchronization signal is connected to the local IEEE 1588 850 network to synchronize it with universal time, and the network is used to carry the signal without deformation to the devices to be synchronized. It should be noted that simplified IEEE 1588 or similar protocols can be advantageously implemented over fiber optic links that can easily span a few tens of kilometers.
    [0032] According to a third embodiment, which can be employed with short distances and times, the time reference source 800 may comprise a stable oscillator included in the partial discharge acquisition and display apparatus 500 and another stable oscillator included in the apparatus sync detection sensors 200, which are synced before carrying out measurements of PD signals and sync signals. The two stable oscillators can also be used as reference sources for additional 900 times.
    [0033] Reference is now made to the synchronization detection apparatus 200 comprising a sensor module 201 and a synchronization processing module 202. The sensor module 201 includes, as an example, one or more voltage sensors such as voltage transformers or capacitive couplers. In particular, the sensor module 201 may include three voltage sensors, each connected to one of the electrical phases of the second electrical object 103. The sensor module 201 is configured to provide at least one SVAC electrical signal representative of the AC VAC electrical voltage.
    [0034] According to the described example, the synchronization processing module 202 includes a sampling device 203 (SAMPL), a control unit 204 (CU), a first local clock 205 (LCK), a first storage module site 206 (LST) and a first network interface module 207 (INT-NW). The sampling device 203 is configured to sample the electrical signal SVaC with a suitable frequency, preferably greater than 1000 times the frequency of the electrical voltage AC VaC feeding the second electrical object 103 (thus obtaining a phase resolution of at least 1 degree) and generate a digital signal.
    [0035] Particularly, the control unit 204, by means of a processing module, is configured to process the digital signal carrying the sampled data to accurately detect zero crossings and period of the SVAC electrical signal. Particularly, the control unit 204 is configured to determine a list of detected synchronization phase values ΦACtn, i.e. phase values of the electrical signal SVAC and thus corresponding to the phase values of the electrical voltage AC VAC. According to a particular embodiment, the processing performed by the control unit 204 may also perform low-pass filtering or band-pass filtering to remove harmonics or noise.
    [0036] The first local clock 205 is structured to provide the control unit 204 with digital data, hereinafter called "time stamp" representing a current time value tn. According to the described embodiment, the first local clock 205 is an accurate clock and can be implemented as a digital counter operating at a frequency included as an example, in the range of 1 MHz - 100 MHz and is synchronized with the reference source of 800 time. If the 800 time reference source is a GPS source, the first local clock 205 is connected to the GPS receiver (not shown in the figures) to extract the STM time reference signal to be used to synchronize the first local clock 205.
    [0037] The first local clock 205 preferably comprises a slow timer and a fast timer. The slow timer is usually 32 bits long and counts in seconds and contains the date and time encoded with a number of seconds from a given epoch. In particular, the Unix epoch (January 1, 1970) is used, but others are possible depending on the reference time used. The fast timer is also a counter, usually 32 bits long, which is incremented at a very fast rate, usually from a few nanoseconds (eg 5-10 ns) to 100 ns, and is used to measure fractions of 1 second . The slow counter is incremented by the overflow of the fast counter, that is, once the sum of the increment of the fast counter reaches 1 second (eg 10,000,000 in 100 ns increments), it is reset and the slow counter is incremented of 1. Preferably, the first local clock 205 is clocked by a local quartz crystal oscillator showing short term stability. This implies that the first local clock 205 is able to maintain the correct time with respect to the time reference source 800 for several seconds or minutes. In order to obtain better accuracy, the clock can be adjusted periodically (for example, once every 1 or 2 seconds) in accordance with the time reference signal STM provided by the time reference source 800. It is also noted that the control unit 204 is configured to associate each detected synchronization phase value ΦACtn with a corresponding timestamp tn provided by the first local clock 205.
    [0038] The first local storage module 206 is structured to store a subset of the sampled data (usually ranging from a few per period to a few per second) with its associated timestamp. Particularly, the first local storage module 206 is configured to store the detected synchronization phase value ΦACtn, its time stamps tn and optionally the instantaneous amplitude values of the AC voltage. The first local storage module 206 also allows for subsequent retrieval of stored data.
    [0039] The first network interface module 207 is configured to connect the synchronization detection apparatus 200 to an NTW computer network such as: a packet network, a Local Area Network (LAN) or a Wide Area Network (WAN). The first network interface module 207 can be an Ethernet, WiFi or GSM/3G modem. Particularly, the first network interface module 207 can be structured to allow the synchronization detection apparatus 200 to act as a server so as to be remotely requested to initiate a data flow to one of the available inputs, or to send stored data . For data streaming, the UDP protocol is used instead.
    [0040] According to another embodiment, the synchronization detection apparatus 200 can be a commercially available synchrophasor to perform the required data acquisition, while data streaming and storage can be performed with specific add-on circuitry. Synchrophasors provide phase and amplitude information for voltage and current on a line at regular sampling intervals, synchronized to a global time reference. According to the IEEE 1344 standard (and nearby revisions) such a synchrophasor should also have an error below 1 μs.
    [0041] According to the described embodiment, the acquisition and processing device 400 (Figure 1) comprises a partial discharge sensor 401, a receiving module 402 (REC-M), an acquisition device 403 (ACQ), a a second local clock 404 (LCK), a frequency controlled synthesizer 405 (FSYN), a second local storage module 406 (LST) and a second network interface module 407 (INT-NW).
    [0042] The partial discharge sensor 401 is adapted to detect the discharge signals Sd and convert them into a received electrical signal Sin (eg an electrical current) available at a first output terminal 1. The partial discharge sensor 401 can be a contact sensor or a non-contact sensor. A contact sensor is brought into contact or in close proximity to the first electrical apparatus 100 while a non-contact or wireless sensor is adapted to perform a remote sensing, i.e., without wires or cables connecting the source and the sensing device and without contact physicist. As an example, remote sensing can be performed at a distance from the signal source of 1 cm to 10 m. Examples of contact sensors are: Rogowsky sensor and magnetic sensor of the coupler transformer type. Examples of non-contact sensors are: magnetic field proximity sensor, acoustic sensor and piezoelectric sensor.
    [0043] According to the embodiment shown in Figure 1, the partial discharge sensor 401 includes an antenna 408 that can be mounted, as an example, on a support structure 409. As a further example, the antenna 408 can be a of the following antennas: small antenna, loop antenna, dipole antenna and ultra wideband. Preferably, antenna 408 is spherical in shape and includes a hollow sphere of electrically conductive material such as, for example, metal or polymer material. The spherical antenna 408 shows, as an example, a diameter comprised between 3 and 30 cm, preferably comprised between 5 and 20 cm. Particularly, antenna 408 may be analogous to that described in patent application WO-A-2009-150627. It is noted that the partial discharge sensor 401 herein also includes a sensor configured to detect AC electrical voltage.
    [0044] The receiving module 402 is configured to perform filtering and amplification of the received electrical signal Sin and thus produce a first partial discharge signal SpD1 to be supplied to the acquisition device 403. The acquisition device 403 is configured to perform the steps process of acquiring the received electrical signal Sin and synchronizing the partial discharge pulses with the AC VAC electrical voltage.
    [0045] Particular examples of the receiving module 402 and the acquisition device 403 are shown in Figure 2. The receiving module 402 is structured as a circuit module between the antenna and the analog front end mixer and includes a high pass filter module 2 and a first amplifier 3. The high pass filter module 2 shows a respective input connected to the first output terminal 1, for the received electrical signal Sin and is structured to remove low frequency noise such as signals. having frequencies lower than 0.1 MHz. As an example, the high pass filter module 2 can include a capacitor C1 connected to a resistor R1.
    [0046] An output of the high pass filtering module 2 is connected to the first amplifier 3 having a second output terminal 6 to provide the first partial discharge signal SpD1 as an example, another filter such as band pass, band reject or low pass filter (not shown) can be connected to the output of high pass filter module 2 to obtain a full passband frequency response with desired characteristics. The first amplifier 3 is provided with a first supply terminal 4 for a supply voltage V1 and a second supply terminal connected to a ground terminal GND. The first amplifier 3 shows, as an example, a bandwidth including at least the bandwidth of the antenna 408 as an example, a bandwidth ranging from 0.1 MHz to 100 MHz.
    [0047] The second local storage module 406, such as a Random Access Memory (RAM) is structured to store data received from the synchronization detection apparatus 200 and the data provided by the acquisition device 403. The second local clock 404 and the second network interface module 407 may be analogous to the first local clock 205 and the first network interface module 207, respectively. Particularly, if the time reference source 800 is a GPS source, the second local clock 404 is connected to a GPS receiver (not shown in the figures) to extract the STM time reference signal to be used to synchronize the second local clock 404.
    [0048] The second network interface module 407 and the first network interface module 207 allow a communication between the acquisition and processing device 400 and the synchronization detection apparatus 200 via NTW network.
    [0049] The frequency controlled synthesizer 405 is structured to generate from data received by the synchronization detection apparatus 200, a plurality of synthesized phase values, representing a synthesized synchronization signal Ssyn1 to be used by the acquisition and display apparatus Partial Discharge 500 to analyze and plot detected partial discharge pulses. A particular embodiment of the frequency controlled synthesizer 405 will be described with reference to Figure 3.
    [0050] The acquisition device 403 shown schematically in Figure 2 comprises a conversion module 410 and a digital processing module 411. The conversion module 410 comprises an optional wideband programmable amplifier 7 having an input connected to the second output terminal 6 and a respective output connected to an analog to digital converter 8 (ADC). The digital processing module 411, as an example a Field Programmable Gate Array (FPGA), is structured to control the optional wideband programmable amplifier 7 and receive data from the analog to digital converter 8. The wideband programmable amplifier optional 7 can be programmed to communicate to the first partial discharge signal SpD1 a shift value and an amplification gain value by means of the shift signal Sof and a gain signal Sga provided by the digital processing module 411, thus producing a signal amplified output Saout.
    [0051] The optional wideband programmable amplifier 7 allows, as an example, a continuous gain variation in the range of about -5dB to +40dB. The analog to digital converter 8 is structured to be synchronized by a clock signal CK generated by the digital processing module 411 and generate digital converted data DTA to be sent to the digital processing module 411. The analog to digital converter 8 is, like a example, capable of converting 250 mega-samples per second at an 8-bit resolution. This sampling frequency makes it possible to acquire the first SpD1 partial discharge signal with a time resolution of 4 ns. It is observed that most partial discharge pulses are usually longer than 0.5 µs, the acquisition device 403 allows to acquire the pulse waveform and represent it with a number of samples comprised between 64 and 512.
    [0052] Further, according to an example, the digital processing module 411 comprises: a processing unit 412 (PU), input/output port 413, a trigger module 414 (TRM), an address generator 415 ( ADD-GEN), a 416 extraction module (EXTR). The input/output port 413 allows transferring Comm output commands generated by the processing unit 412 to the optional wide-band programmable amplifier 7, in the form of the shift signal Sof and the gain signal Sga. The address generation module 415 is configured to generate the addresses necessary to write new data to the second local storage module 406 and read data stored in said local storage module 406, under the control of the processing unit 412.
    [0053] The trigger module 414 is configured to trigger the memorization in the second local storage module 406 of samples of the amplified output signal Saout provided by the analog to digital converter 8, only for selected values of the amplified output signal Saout such as, by For example, only for positive or negative pulses having an amplitude (that is, an absolute value) greater than a threshold level. Trigger module 414 may be a logic module operating under control of processing unit 412 and comprising one or more comparators for comparing the values of samples provided by the analog to digital converter with one or more thresholds.
    [0054] The processing unit 412 can be configured to perform memorization in the second local storage module 406 of samples of the amplified output signal Saout selected by the trigger module 414, together with the corresponding time stamps tn provided by the second local clock 404. Furthermore, the processing unit 412 is configured to control the memorization in the local storage module 406 of the phase values of the synthesized synchronization signal Ssyn1 and its timestamps as available from the frequency controlled synthesizer 405.
    [0055] The extraction module 416 (for example, a coprocessor) connected to the processing unit 412, is configured to perform extraction, particularly real-time extraction, of pulse characteristics from the data stored in the local storage module 406 Examples of possible pulse characteristics extracted by the coprocessor are: peak value and polarity, phase, energy, duration and approximate estimation of the Weibull parameters.
    [0056] According to a first embodiment shown schematically in Figure 3, the frequency controlled synthesizer 405 is a digital module comprising: a phase comparator 9 (PH-CP), an optional filter module 10 (FIL) and a oscillator 11 (OSC). Oscillator 11 is configured to generate the synthesized phase values ΦSY'Nin representing the synthesized synchronization signal Ssyn and is adjustable according to phase errors εti provided as its input. Phase comparator 9 is configured to compute said phase errors εti from the synthesized phase values ΦSYNtn, the detected synchronization phase values ΦSYNtn and the corresponding time stamps tn.
    [0057] In more detail, the frequency controlled synthesizer 405 is provided with an input 13 for receiving AC-DT input data (i.e. detected synchronization phase values ΦACtn and time stamps representing reference time values tn) obtained from sync detection apparatus 200. Oscillator 11 may be a low frequency synthesizer structured to generate a periodic digital waveform forming the synthesized sync signal Ssyn. Particularly, oscillator 11 can be a DDS configured to generate a signal with a frequency in the range of 0.01 Hz to 10 KHz. The phase and frequency of the signal generated by the oscillator 11 can finally be tuned in accordance with the results provided by the phase comparator 9. The phase comparator 9 comprises a first input connected to input 13 for receiving detected synchronization phase values ΦACtn and a second input to receive phase values ΦSYNtn from a phase time shifter 12. Further, phase comparator 9 is configured to provide, on a corresponding output, phase error values εi computed as the difference between the values of phase on its input.
    [0058] The phase time shifter 12 is structured to receive the elapsed time value tj from the AC-DT input data associated with a detected synchronization phase value ΦACtj which is at the input of the phase comparator 9 at the instant current it. Further, the phase time shifter 12 is adapted to select among the synthesized phase values ΦSYNtn a previous synthesized phase value ΦSYNtj generated in said past time value tj and provide the previous synthesized phase value ΦSYNtj as a comparison value for the phase comparator 9. The optional filter module 10 can be a low pass filter or an integrator, and is configured to filter out phase error values εi in order to avoid abrupt phase transition at its output and to mitigate possible reception sporadic AC voltage samples, producing εFi filtered error values.
    [0059] Referring now to the display 300 (Figures 1 and 4), this comprises according to a particular embodiment the following modules/devices: a transceiver 301 (TR) for exchanging data/commands with the acquisition and processing device 400 , as an example, via the second network interface module 407, an additional processing unit 302 (PU), a memory module 303 (M), a display module and interface 304 (DYS), such as a keyboard and/ or a touch screen. Display 300 also allows receiving digital DS data from acquisition and processing device 400. Particularly, digital DS data includes partial discharge amplitude values APDn, synthesized phase values ΦSYNtn, and time stamps tn. The display 300 is structured to produce a phase-resolved pattern in which any partial discharge amplitude value APDn is associated with a phase value ΦSYNtn of the properly synthesized synchronization signal Ssyn1 that is synchronized to the AC VAC electrical voltage.
    [0060] As an example, the display 300 which is, as an example, provided with a Graphical User Interface (GUI) allows to display this resolved phase pattern in which the maximum amplitude of each partial discharge pulse is plotted versus the value of corresponding phase. According to another example, the display 300 may be included in the acquisition and processing device 400 and operates under the control of the processing unit 412.
    [0061] According to a specific embodiment, a plurality of synchronization detection apparatus 200 and a plurality of partial discharge acquisition and display apparatus 500 can be employed to monitor a particular area and the NTW network can be used to locate, that is, retrieve a list describing the location, type of connection, capabilities and network address of said available devices, requiring the start of data streaming. Management of available devices can be handled by a centralized server. The Applicant noted that the phase of the AC electrical voltage in a power network is almost constant over a certain geographic area (up to tens or thousands of kilometers), but may vary slightly over a wider area (regions, countries, etc.). A convenient approach might be to set up a network of fixed synchronization detection apparatus 200, distributed over a wide geographic area. In this way, for each partial discharge acquisition and display apparatus 500 at a location, substantially close phase data will be available to reconstruct the synchronization phase.
    [0062] A particular example of the method of operation of the partial discharge detection system 1000 is now described. The synchronization detection apparatus 200 and the partial discharge acquisition and visualization apparatus 500 can be activated at the same time. The sensor module 201 (Figure 1) detects the AC VAC electrical voltage associated with one or more of the electrical lines included in the second electrical object 103. The sampling device 203 produces, from the AC VaC electrical voltage, the list of values of Sync phase detected ΦACtn of the phase of electrical voltage detected. The first local clock 205, which is kept synchronized with the time reference source 800, produces time stamps tn. The list of detected synchronization phase values ΦACtn and the corresponding timestamps tn are stored in the first local storage module 206 for future searches or for transmission along with the NTW network, forming a DT-STR data stream that is sent in the direction of the partial discharge acquisition and display apparatus 500 by means of the first network interface module 207.
    [0063] Preferably, the streaming technique implemented by the NTW network which is unidirectional, continuous and generally regular in data transmission time, shows a latency < 1s and thus makes real-time synchronization operations possible. The term "real-time synchronization operations" means that it is possible to plot the partial discharge pattern while measuring the partial discharge pulses.
    [0064] The DT-STR data stream transmitted over the NTW network is received by the second network interface module 407 of the acquisition and processing device 400 and the list of detected synchronization phase values ΦACtn and corresponding time stamps tn is stored in the second local storage module 406 to be used by the acquisition device 403 and/or frequency controlled synthesizer 405. With reference to the acquisition and processing device 400, the partial discharge sensor 401 (Figure 2) detects the signals of discharge Sd and converts them into the received electrical signal Sin which is filtered and amplified by the receiving module 402, thus obtaining the first partial discharge signal SpD1 to be supplied to the acquisition device 403 which provides the converted data DTA.
    [0065] The converted DTA data is sent to the digital processing module 411 and the trigger module 414 selects a list of partial discharge amplitude values APDn among the converted DTA data that are greater than a threshold level and allows its memorization in the second local storage module 406. The partial discharge amplitude values APDn represent the amplitude values of the partial discharge electromagnetic impulse signal Sd. Still further, the second local clock 404 can provide time stamp values tn, each associated with corresponding partial discharge amplitude values APDn, which can be memorized in the second local storage module 406.
    [0066] The frequency controlled synthesizer 405 (Figure 3) receives the detected sync phase values ΦACtn and the time stamps tn, generates the synthesized sync signal Ssyn and provides the synthesized phase values ΦSYNtn. Particularly, at a current instant ti, a detected synchronization phase value ΦACtj showing past time stamp tj, where ti > tj, that is, after a latency due to transmission over the NTW network.
    [0067] It should be noted that the latency associated with the connection over the NTW network between the synchronization detection apparatus 200 and the acquisition and processing device 400 may be unpredictable and not constant for each data packet, due to structural reasons (propagation delay, routing, etc.) or to network protocols (use of flow control algorithms such as TCP/IP). This latency, which can be up to one or two orders of magnitude greater than the period of the AC VAC voltage (ie, up to seconds) precludes direct use of input data for synchronization and real-time operation, either because the data (eg detected synchronization phase value ΦACtj) are already "stale" when it reaches the acquisition and processing device 400 (refers to an instant located hundreds of seconds in the past), or due to its unpredictable latency .
    [0068] With reference to the controlled frequency synthesizer 405, at the current time ti, the phase time shifter 12 receives at its input the timestamp corresponding to the past time value tj, and thus selects among the synthesized phase values ΦSYNtn a previous synthesized phase value ΦSYNtj generated at said past time tj value and provides said previous synthesized phase value ΦSYNti as comparison value for the phase comparator 9. The phase comparator 9 calculates the value of the difference between the phase value detected timing value ΦACtj at past time value tj, and the previous synthesized phase value ΦSYNtj generated at the same past time value tj and generates a corresponding phase error value εi at current time ti. εi = ΦSYNtj - ΦACtj (1)
    [0069] The computed phase error value εi, after filtering performed by the optional filter module 10, is provided to the oscillator 11 to adjust the generated synthesized phase values ΦSYNtn. Figure 5a shows an example of the phase adjustment performed by the frequency controlled synthesizer 405 on a synthesized synchronization signal Ssyn. In more detail, the trend of the synthesized synchronization signal Ssyn, the corresponding detected synchronization phase values ΦACtn and the behavior of the partial discharge pulses PD are shown in Figure 5a. At a third instant past t = -0.25 a third error ε3 is calculated as in formula (1), at a second instant past t = -0.11, a second phase error ε2 smaller than the third error ε3 is calculated ; at a first past instant t = -0.004 and at a current instant t = 0, the phase error is null.
    [0070] With reference to the described method, it is observed that the phase error value εi has been calculated without the need to estimate any fixed latency associated with the NTW network. It is also noted that, due to the relatively high frequency stability of AC VAC electrical voltage, even new detected synchronization phase values ΦACtn, time stamps tn are sent per second from the synchronization detection apparatus 200 to the acquisition device and 400 processing, this is enough to guarantee a good phase synchronization between the AC VaC voltage and the oscillator 11: this allows to reduce the requirements for the data flow (bandwidth, latency, integrity, regularity, etc.) in NTW network and operate with (or advantageously exploit) low-quality or low-cost network connections. As an example, the NTW network can be a satellite network with reduced bandwidth (eg 56 kpbs) and latency of a few seconds. Thus, using oscillator 11 as a synchronization source, once a partial discharge pulse (ie, amplitude values aPDn) is acquired, its associated phase, ie, the synthesized phase value ΦSYNtj is immediately known, independently of any network or processing delay. Particularly, an amplitude value aPDi acquired with a timestamp ti is associated with a synthesized phase value ΦSYNti generated with the same timestamp ti. A list of the APDn amplitude values and the synthesized ΦSYNtn phase values is transmitted to the display 300. The additional processing unit 302 of the display 300 manages the visualization in the Display and Interface Module 304 of a plot representing the aPDn amplitude values in the values SYNtn-phase phases correspondingly synthesized, as shown in Figure 6, as an example. This visualization can be done in real time, that is, simultaneously with the acquisition of the amplitude values aPDn. According to another embodiment, the display is not performed in real time: for example, a list of amplitude values aPDn can be stored in the local storage module 206 or in the memory module 303 together with the detected sync phase values ΦACtn and tn time stamps. Subsequently (eg after 2-5 seconds) these stored values can be used to compute the phase error value εi according to formula (1), the adjustment of the generated synthesized phase values ΦSYNtn produced by the oscillator 11 to allow the display in the display and interface module 304 of the plot representing the amplitude values APDn of the corresponding synthesized phase values ΦSYNtn.
    [0071] It is observed that, according to an additional functionality for the use of the frequency controlled synthesizer 405, sampled amplitude values AACtn of the AC VAC electrical voltage, the detected synchronization phase values ΦACtn and the corresponding time stamps received tn by the acquisition and processing device 400 can be memorized in the second local storage module 406 for use in a later resynchronization of the amplitude values aPDn. According to this example, the additional processing unit 302 computes a Sint sine (Figure 5b) by interpolating a certain number of samples of AC voltage VaC in a TW time window (eg less than 5 seconds) centered around each pulse timing, and then getting from this computed sinusoid the pulse angle, a phase value. This additional method needs to acquire a certain number of samples preceding and following each partial discharge pulse, so it is not well suited for fast real-time operations. According to this additional method, only AC samples around the PD pulse that provide better interpolation results are considered to compute a single interpolation sine wave, since the grid frequency may have short time deviation, but maintain an average frequency very regular (thus instantaneous deviation cannot be derived from long-term averages).
    [0072] The Applicant tested the possibility of generating synchronized time stamps using two identical boards implementing the first local clock 205 and the second local clock 404. Each clock circuit was implemented in a Field Programmable Port Arrangement (FPGA) and tested with a 50 MHz clock generated by a quartz oscillator, corresponding to an increment in the fast counter rate at 20 ns. The fast counter overflow (and thus a second instant) has been set to 50,000,000. The two identical plates were started together and time distortion was recorded over time. Without any correction from an external common reference, thus considering only free oscillators, the deviation ranged from 60 to 2400 ns in 1 second. Furthermore, by employing two different GPS receivers as the 800 time reference source and using the 1PPS signal to correct the counters, the offset was almost canceled and only a fixed offset of about 40 ns was maintained between the two oscillators. The quality of the synchronization was influenced by the quality of the received GPS signal, however in each case the drift between two timers was almost canceled and only one shift < 100 ns was present. This experiment confirmed the adequate short-term stability of quartz oscillators and the possibility of correcting the timers with external references. The timer was also used to generate time stamps for simulated PD pulses with known timings. The values obtained confirmed the possibility of the system generating time stamps with a precision better than 1 μs.
    [0073] It is observed that the 1000 partial discharge detection system allows to carry out the synchronization of the acquired partial discharge pulses with the AC electrical voltage even if the electrical object under test does not allow the local detection of the AC electrical voltage. Furthermore, the use of the 205 frequency synthesizer and the described control technique give the possibility to perform real-time acquisition and plot the partial discharge pulses properly synchronized with the remotely detected AC electrical voltage. Since the 205 frequency synthesizer control technique does not require a large number of samples of the detected AC electrical voltage to be processed, the described system can be implemented with a network showing reduced data flow requirements (bandwidth, latency, integrity, regularity, etc.) and low quality/cost of the network connecting the acquisition and processing device 400 to the synchronization detection apparatus 200.
    权利要求:
    Claims (20)
    [0001]
    1. A partial discharge detection system (1000) comprising: a partial discharge processing and acquisition device (400) comprising: a partial discharge detection device (401) configured to provide a partial discharge detected electrical signal (SPDI) from a partial discharge pulse generated by a first electrical object (100); a first communication module (407) configured to receive a detected synchronization signal carrying detected synchronization phase values (0Actn) and corresponding reference time values (tn) associated with an electrical supply voltage (VAC) of a second object electric (103); characterized in that it further comprises: an adjustable phase value generator (11) configured to produce synthesized phase values (ΦsYNtn) representing a synthesized synchronization signal (Ssyn1), the adjustable phase value generator (11) being adjustable according to phase errors (εti); an error computing module (9) configured to compute said phase errors (εti) from the synthesized phase values (ΦsYNtn), the detected synchronization phase values (0Actn) and the corresponding reference time values (tn ); and an acquisition device (403) configured to receive the detected electrical partial discharge signal (SpD1) and the synthesized synchronization signal (Ssyn1) to synchronize the partial discharge pulse with the electrical supply voltage (VAC).
    [0002]
    2. Detection system according to claim 1, characterized in that: the error computation module (9) is configured to compute, among the phase errors (εti), a phase error (εti) current to from a previous detected sync phase value (ΦActj) associated with a past reference time value (tj) and a comparison value; and wherein the partial discharge acquisition and processing device (400) further includes: a time shifter module (12) configured to select, from the synthesized phase values (ΦsYNtn), a previous synthesized phase value (ΦsYNtj) generated at said past reference time value (tj) and providing said previous synthesized phase value as comparison value to the error computation module (9).
    [0003]
    3. Detection system according to claim 1, further including a synchronization detection apparatus (200) characterized in that it comprises: a sensor module (201) for converting the electrical supply voltage (VAC) into a signal converted electric; a sync processing module (204, 203) structured to receive the converted electrical signal and generate said detected sync signal by associating the detected sync phase values (0Actn) with corresponding reference time values; a second communication module (207) configured to transmit said detected synchronization signal over a communication network (NTW) connectable to said first communication module (407).
    [0004]
    4. Detection system according to claim 3, characterized in that it additionally includes: a time reference source (800; 850; 900) structured to provide a time reference signal to the download acquisition and processing device partial (400) and to the synchronization detection apparatus (200) for generating said reference time values (tn).
    [0005]
    5. Detection system according to claim 4, characterized in that the time reference source is one of the following sources: GPS time source, stable oscillator time source, IEEE 1588 network time source.
    [0006]
    6. Detection system according to claim 2, characterized in that the partial discharge acquisition and processing device (400) is placed remotely from the second electrical object (103).
    [0007]
    7. Detection system according to claim 2, characterized in that the acquisition device (403) is configured to process the detected partial discharge electrical signal (SPDI) and provide the partial discharge amplitude values (APDO) .
    [0008]
    8. Detection system according to claim 3, characterized in that: the sensor module (201) is one of the following devices: voltage transformer, capacitive coupler.
    [0009]
    9. Detection system according to claim 1, characterized in that the partial discharge detection device (401) is one of the following sensors: contact sensor, non-contact sensor, Rogowsky sensor, transformer-type magnetic sensor coupler, magnetic field proximity sensor, acoustic sensor, piezoelectric sensor, antenna sensor.
    [0010]
    10. Detection system according to claim 4, characterized in that: the partial discharge acquisition and processing device (400) comprises a first local clock generator (404), configured to produce, from the signal of time reference, a timing signal for synchronizing the acquisition device (403); the synchronization detection apparatus (200) comprises a second local clock generator (205) configured to produce, from the time reference signal, said time reference values (tn).
    [0011]
    11. Detection system according to claim 7, characterized in that it further comprises: a display (300) connected to the partial discharge acquisition and processing device (400) and configured to display said partial discharge amplitude values ( APDΠ) on the corresponding synthesized phase values (ΦsYNtπ).
    [0012]
    12. Detection system according to claim 1, characterized in that the partial discharge acquisition and processing device (400) additionally includes: a filter module (10) configured to filter phase errors by reducing the abrupt transition of phase in the synthesized phase values (ΦSYNtn) produced by the adjustable phase value generator (11).
    [0013]
    13. Detection system according to claim 1, characterized in that the adjustable phase value generator (11) is configured to generate a periodic digital waveform presenting the frequency of said electrical supply voltage (VAC).
    [0014]
    14. Detection system according to claim 13, characterized in that the adjustable phase value generator (11) is a direct digital synthesizer (DDS) configured to generate a signal with a frequency in the range of 0.01 Hz at 10 KHz.
    [0015]
    15. Detection system according to claim 3, characterized in that the communication network (NTW) is at least one of the following networks: a packet network, a Local Area Network (LAN), an Area Network Extensive (WAN), Ethernet, WiFi, Global System for Mobile Communication (GSM) network / 3G network.
    [0016]
    16. Detection system according to claim 3, characterized in that the synchronization detection apparatus (200) is structured to transmit the detected synchronization signal carrying detected synchronization amplitude values (AActn) representing the supply voltage electrical and associated with detected synchronization phase values (ΦACtn) and reference time values (tn); the partial discharge acquisition and processing device (400) is configured to generate a reconstructed sync signal (Sint) from the detected sync signal by interpolating the sync detected amplitude values (AACIΠ).
    [0017]
    17. A method of partial discharge detection, comprising: in a first processing apparatus (400): detecting a partial discharge pulse generated by a first electrical object (100) and providing a detected partial discharge electrical signal (SPDI); receiving a detected synchronization signal carrying detected synchronization phase values (ΦACtn) and corresponding reference time values (tn) associated with an electrical supply voltage (VAC) of a second electrical object (103); characterized in that it further comprises: generating a plurality of synthesized phase values (ΦSYNtn) representing a synthesized synchronization signal (Ssyn1); compute phase errors (εti) from the synthesized phase values (ΦSYNtn), the detected synchronization phase values (ΦACtn) and the corresponding reference time values (tn); adjust phases of the various synthesized phase values (ΦSYNtn) according to the phase errors (εti); in an acquisition device (403): receiving the detected electrical partial discharge signal (SpD1) and the synthesized synchronization signal (Ssyn1) and synchronizing the partial discharge pulse with the electrical supply voltage (VAC).
    [0018]
    18. Detection method according to claim 17, characterized in that it includes: selecting from the plurality of synthesized phase values (ΦsYNtn) a previous synthesized phase value (ΦsYNtj) generated at said reference time value past (tj); and wherein computing said phase errors (εti) includes computing, at a current time (ti), an actual phase error (εti) from a past detected synchronization phase value (ΦACtj) associated with said time value past reference value (tj) and to said previous synthesized phase value (ΦsYNtj).
    [0019]
    19. Detection method according to claim 17, characterized in that it includes, in a second processing apparatus (200): converting the electrical supply voltage (VAC) into a converted electrical signal; receiving the converted electrical signal and generating said detected sync signal, associating the detected sync phase values (0Actn) with corresponding reference time values; transmitting towards said first processing apparatus (400) said detected synchronization signal over a communication network (NTW).
    [0020]
    20. Detection method according to claim 17, characterized in that it comprises: processing the detected partial discharge electrical signal (SPDI) and providing partial discharge amplitude values (aPDn) to display said partial discharge amplitude values ( aPDn) corresponding to the synthesized phase values (ΦsYNtn).
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    同族专利:
    公开号 | 公开日
    US20160274176A1|2016-09-22|
    DK3063547T3|2021-07-12|
    BR112016009373A2|2017-08-01|
    EP3063547A1|2016-09-07|
    AU2013404355A1|2016-04-21|
    EP3063547B1|2021-04-28|
    ES2879903T3|2021-11-23|
    CN105683766A|2016-06-15|
    WO2015062628A1|2015-05-07|
    US10024903B2|2018-07-17|
    AR098202A1|2016-05-18|
    CA2928525C|2020-12-29|
    CA2928525A1|2015-05-07|
    CN105683766B|2019-01-11|
    AU2013404355B2|2018-08-09|
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    法律状态:
    2020-01-14| B06U| Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]|
    2021-05-25| B09A| Decision: intention to grant [chapter 9.1 patent gazette]|
    2021-06-29| B16A| Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 29/10/2013, OBSERVADAS AS CONDICOES LEGAIS. |
    优先权:
    申请号 | 申请日 | 专利标题
    PCT/EP2013/072569|WO2015062628A1|2013-10-29|2013-10-29|Partial discharge detection system and method employing a synthetized synchronization signal|
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